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july 2010 doc id 17605 rev 1 1/27 1 VND830ASP-E double channel high-side solid state relay features ecopack ? : lead free and rohs compliant automotive grade: compliance with aec guidelines very low standby current cmos compatible input proportional load current sense current sense disable thermal shutdown protection and diagnosis undervoltage shutdown overvoltage clamp load current limitation description the VND830ASP-E is a monolithic device made using stmicroelectronics? vipower? m0-3 technology. it is intended for driving any kind of load with one side connected to ground. active v cc pin voltage clamp protects the device against low energy spikes (see iso7637 transient compatibility table). this device has two channels in high-side configuration; each channel has an analog sense output on which the sensing current is proportional (according to a known ratio) to the corresponding load current. built-in thermal shutdown and outputs current limitation protect the chip from overtemperature and short circuit. device turns-off in case of ground pin disconnections. type r ds(on) i out v cc VND830ASP-E 60 m 6a (1) 1. per channel 36 v (1) 1 10 powerso-10 table 1. device summary package order codes tube tape and reel power-so-10? VND830ASP-E vnd830asptr-e www.st.com
contents VND830ASP-E 2/27 doc id 17605 rev 1 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.1 gnd protection network against reverse battery . . . . . . . . . . . . . . . . . . . 17 3.1.1 solution 1: resistor in the ground line (rgnd only) . . . . . . . . . . . . . . . . 17 3.1.2 solution 2: diode (dgnd) in the ground line . . . . . . . . . . . . . . . . . . . . . 18 3.2 load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.3 mcu i/os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.4 powerso-10 maximum demagnetization energy (v cc = 13.5 v) . . . . . . . 19 4 package and pcb thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.1 powerso-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.1 ecopack ? packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.2 powerso-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.3 powerso-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
VND830ASP-E list of tables doc id 17605 rev 1 3/27 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 4. power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 5. switching (v cc = 13 v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 6. logic input (channel 1, 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 7. v cc - output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 8. protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 9. current sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 10. truth table (per each channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 11. electrical transient requirements on v cc pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 12. electrical transient requirements on v cc pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 13. electrical transient requirements on v cc pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 14. thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 15. powerso-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 16. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
list of figures VND830ASP-E 4/27 doc id 17605 rev 1 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 4. switching characte ristics (resistive load r l =6.5 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 5. i out /i sense versus i out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 6. waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 7. off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 8. high level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 9. input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 10. input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 11. input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 12. input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 13. overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 14. i lim vs t case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 15. turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 16. turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 17. on-state resistance vs t case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 18. on-state resistance vs v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 19. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 20. maximum turn- off current versus load inductance (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 21. powerso-10 pc board (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 22. rthj-amb vs pcb copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 20 figure 23. powerso-10 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . 21 figure 24. thermal fitting model of a double channel hsd in powerso-10 . . . . . . . . . . . . . . . . . . . . 21 figure 25. powerso-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 26. powerso-10 suggested pad layout and tube shipment (no suffix). . . . . . . . . . . . . . . . . . . 25 figure 27. tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
VND830ASP-E block diagram and pin description doc id 17605 rev 1 5/27 1 block diagram and pin description figure 1. block diagram figure 2. configurati on diagram (top view) logic undervoltage overvoltage overtemp. 1 overtemp. 2 ilim2 pwclamp 2 k iout2 ilim1 pwclamp 1 k iout1 input 1 input 2 gnd vcc output 1 current sense 1 output 2 current sense 2 driver 2 driver 1 v cc clamp ot1 ot2 ot1 ot2 vdslim1 vdslim2 1 2 3 4 5 6 7 8 9 10 11 output 2 output 2 n.c. output 1 output 1 ground input 2 input 1 c.sense1 c.sense2 v cc powerso-10
electrical specifications VND830ASP-E 6/27 doc id 17605 rev 1 2 electrical specifications figure 3. current and voltage conventions 2.1 absolute maximum ratings stressing the device above the rating listed in ta b l e 2 may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. refer also to th e stmicroelectronics sure progra m and other rele vant quality document. i s i gnd output2 v cc i out2 v cc v sense2 current sense 1 i sense1 v out2 output1 i out1 current sense 2 i sense2 v sense1 v out1 input2 i in2 input1 i in1 v in2 v in1 ground table 2. absolute maximum ratings symbol parame ter value unit v cc dc supply voltage 41 v -v cc reverse supply voltage -0.3 v - i gnd dc reverse ground pin current -200 ma i out output current internally limited a i r reverse output current -6 a i in input current +/- 10 ma v csense current sense maximum voltage -3 +15 v v
VND830ASP-E electrical specifications doc id 17605 rev 1 7/27 2.2 thermal data v esd electrostatic discharge (human body model: r=1.5 ; c=100pf) ? input ? current sense ?output ?v cc 4000 2000 5000 5000 v v v v e max maximum switching energy (l = 1.8 mh; r l =0 ; v bat =13.5v; t jstart = 150 c; i l =9a) 100 mj p tot power dissipation at t c =25c 74 w t j junction operating temperature internally limited c t c case operating temperature -40 to 150 c t stg storage temperature -55 to 150 c table 2. absolute maximum ratings (continued) symbol parame ter value unit table 3. thermal data symbol parameter value unit r thj-case thermal resistance junction-case 1.3 c/w r thj-amb thermal resistance junction-ambient 51.2 (1) 1. when mounted on a standard single sided fr-4 board with 0.5 cm 2 of cu (at least 35 m thick). horizontal mounting and no artificial air flow. c/w
electrical specifications VND830ASP-E 8/27 doc id 17605 rev 1 2.3 electrical characteristics values specified in this section are for 8 v < v cc < 36 v; -40 c < t j < 150 c, unless otherwise specified. (per each channel). table 4. power symbol parameter test conditions min. typ. max. unit v cc operating supply voltage 5.5 13 36 v v usd undervoltage shutdown 3 4 5.5 v v ov overvoltage shutdown 36 v r on on-state resistance i out =2a; t j =25c 60 m i out =2a; t j =150c 120 m v clamp clamp voltage i cc =20ma (1) 1. v clamp and v ov are correlated. typical difference is 5 v. 41 48 55 v i s supply current off-state; v cc =13v; v in =v out =0v 12 40 a off-state; v cc =13v; v in =v out =0v; t j =25c 12 25 a on-state; v in =5v; v cc =13v; i out =0a; r sense =3.9k 7ma i l(off1) off-state output current v in =v out =0v; v cc =36v; t j = 125 c 050a i l(off2) off-state output current v in =0v; v out =3.5v -75 0 a i l(off3) off-state output current v in =v out =0v; v cc =13v; t j =125c 5a i l(off4) off-state output current v in =v out =0v; v cc =13v; t j =25c 3a table 5. switching (v cc =13v) symbol parameter test conditions min typ max unit t d(on) turn-on delay time r l =6.5 from v in rising edge to v out =1.3v -30-s t d(off) turn-on delay time r l =6.5 from v in falling edge to v out =11.7v -30-s (dv out /dt) on turn-on voltage slope r l =6.5 from v out =1.3v to v out =10.4v - see figure 15 -v / s (dv out /dt) off turn-off voltage slope r l =6.5 from v out =11.7v to v out =1.3v - see figure 16 -v / s
VND830ASP-E electrical specifications doc id 17605 rev 1 9/27 table 6. logic input (channel 1, 2) symbol parameter test conditions min typ max unit v il input low level voltage 1.25 v i il low level input current v in =1.25v 1 a v ih input high level voltage 3.25 v i ih high level input current v in = 3.25 v 10 a v i(hyst) input hysteresis voltage 0.5 v v icl input clamp voltage i in =1ma 6 6.8 8 v i in =-1ma -0.7 v table 7. v cc - output diode symbol parameter test c onditions min typ max unit v f forward on voltage -i out =2a; t j = 150 c - - 0.6 v table 8. protection symbol parameter test conditions min. typ. max. unit i lim dc short circuit current v cc =13v 6 9 15 a 5.5 v < v cc <36 v 15 a t tsd thermal shutdown temperature 150 175 200 c t r thermal reset temperature 135 c t hyst thermal hysteresis 7 15 c v demag turn-off output voltage clamp i out =2a; v in =0v; l=6mh v cc -41 v cc -48 v cc -55 v v on output voltage drop limitation i out =10ma 50 mv
electrical specifications VND830ASP-E 10/27 doc id 17605 rev 1 table 9. current sense (1) symbol parameter test co nditions min typ max unit k 0 i out /i sense i out1 or i out2 =0.05a; v sense = 0.5 v; other channels open; t j = -40 c...150 c 600 1300 2000 k 1 i out /i sense i out1 or i out2 =0.25a; v sense = 0.5 v; other channels open; t j = -40 c...150 c 1000 1400 1900 dk 1 /k 1 current sense ratio drift i out1 or i out2 =0.25a; v sense = 0.5 v; other channels open; t j = -40 c...150 c -10 +10 % k 2 i out /i sense i out1 or i out2 =1.6a; v sense =4v; other channels open; t j =-40c t j = 25 c...150 c 1280 1300 1500 1500 1800 1780 dk 2 /k 2 current sense ratio drift i out1 or i out2 =1.6a; v sense =4v; other channels open; t j = -40 c...150 c -6 +6 % k 3 i out /i sense i out1 or i out2 =2.5a; v sense =4v; other channels open; t j =-40c t j = 25 c...150 c 1280 1340 1500 1500 1680 1600 dk 3 /k 3 current sense ratio drift i out1 or i out2 =2.5a; v sense =4v; other channels open; t j = -40 c...150 c -6 +6 % i sense analog sense leakage current v in =0v; i out =0a; v sense =0v; t j = -40 c...150 c 05a v in =5v; i out =0a; v sense =0v; t j = -40 c...150 c 010a v sense max analog sense output voltage v cc = 5.5 v; i out1,2 =1.3a; r sense =10k 2v v cc >8v, i out1,2 =2.5a; r sense =10k 4v v senseh sense voltage in overtemperature condition v cc =13v; r sense =3.9k 5.5 v r vsenseh analog sense output impedance in overtemperature condition v cc =13v; t j >t tsd ; all channels open 400 t dsense current sense delay response to 90% i sense (2) 500 s 1. 9 v v cc 16 v (see figure 4 ) 2. current sense signal delay after positive input slope. sense pin doesn?t have to be left floating.
VND830ASP-E electrical specifications doc id 17605 rev 1 11/27 figure 4. switching characteristics (resistive load r l =6.5 ) figure 5. i out /i sense versus i out v out dv out /dt (on) t r 80% 10% t f dv out /dt (off) i sense t t 90% t d(off) input t 90% t d(on) t dsense iout/isense 500 750 1000 1250 1500 1750 2000 2250 0.0 0.5 1.0 1.5 2.0 2.5 3.0 iout [a] a b c d e a : max, tj = -40 c to 150 c d : min, tj = 25 c to 150 c b : max, tj = 25 c to 150 c e : min, tj = -40 c to 150 c c : typical, tj = -40 c to 150 c
electrical specifications VND830ASP-E 12/27 doc id 17605 rev 1 table 10. truth table (per each channel) conditions input output sense normal operation l h l h 0 nominal overtemperature l h l l 0 v senseh undervoltage l h l l 0 0 overvoltage l h l l 0 0 short circuit to gnd l h h l l l 0 (t j t tsd ) v senseh short circuit to v cc l h h h 0 < nominal negative output voltage clamp ll0
VND830ASP-E electrical specifications doc id 17605 rev 1 13/27 table 11. electrical transient requirements on v cc pin (part 1) iso t/r 7637/1 test pulse test levels i ii iii iv delays and impedance 1 -25 v -50 v -75 v -100 v 2 ms, 10 2 +25 v +50 v +75 v +100 v 0.2 ms, 10 3a -25 v -50 v -100 v -150 v 0.1 s, 50 3b +25 v +50 v +75 v +100 v 0.1 s, 50 4 -4 v -5 v -6 v -7 v 100 ms, 0.01 5 +26.5 v +46.5 v +66.5 v +86.5 v 400 ms, 2 table 12. electrical transient requirements on v cc pin (part 2) iso t/r 7637/1 test pulse test levels results i ii iii iv 1cccc 2cccc 3acccc 3bcccc 4cccc 5c e e e table 13. electrical transient requirements on v cc pin (part 3) class contents c all functions of the device are performed as designed after exposure to disturbance. e one or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
electrical specifications VND830ASP-E 14/27 doc id 17605 rev 1 figure 6. waveforms sense n input n normal operation undervoltage v cc v usd v usdhyst input n overvoltage v cc sense n input n sense n load current n load current n load current n overtemperature input n sense n t tsd t r t j load current n v ov v cc > v ov v cc < v ov short to ground input n load current n sense n load voltage n input n load voltage n sense n load current n VND830ASP-E electrical specifications doc id 17605 rev 1 15/27 2.4 electrical char acteristics curves figure 7. off-state output current figure 8. high level input current figure 9. input clamp voltag e figure 10. input high level figure 11. input low level figure 12. input hysteresis voltage -50 -25 0 25 50 75 100 125 150 175 tc ( o c ) 0 1 2 3 4 5 6 7 8 il(off1) (ua) off state vcc=13v vin=vout=0v -50 -25 0 25 50 75 100 125 150 175 tc ( o c ) 1 1.5 2 2.5 3 3.5 4 4.5 5 iih (ua) vin=3.25v -50 -25 0 25 50 75 100 125 150 175 tc ( o c ) 6 6.2 6.4 6.6 6.8 7 7.2 7.4 7.6 7.8 8 vicl (v) iin=1ma -50 -25 0 25 50 75 100 125 150 175 tc (o c ) 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 vih (v) vcc=13v -50 -25 0 25 50 75 100 125 150 175 tc (o c ) 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 vil (v) vcc=13v -50 -25 0 25 50 75 100 125 150 175 tc ( o c ) 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 vhyst (v) vcc=13v
electrical specifications VND830ASP-E 16/27 doc id 17605 rev 1 figure 13. overvoltage shutdown figure 14. i lim vs t case figure 15. turn-on voltage slope figure 16. turn-off voltage slope figure 17. on-state resistance vs t case figure 18. on-state resistance vs v cc -50 -25 0 25 50 75 100 125 150 175 tc ( o c ) 30 32.5 35 37.5 40 42.5 45 47.5 50 vov (v) -50 -25 0 25 50 75 100 125 150 175 tc ( o c ) 0 2.5 5 7.5 10 12.5 15 17.5 20 ilim (a) vcc=13v -50 -25 0 25 50 75 100 125 150 175 tc ( o c ) 200 250 300 350 400 450 500 550 600 dvout/dt(on) (v/ms) vcc=13v rl=6.5ohm -50 -25 0 25 50 75 100 125 150 175 tc ( o c ) 0 50 100 150 200 250 300 350 400 450 500 dvout/dt(off) (v/ms) vcc=13v rl=6.5ohm -50 -25 0 25 50 75 100 125 150 175 tc ( o c ) 0 10 20 30 40 50 60 70 80 90 100 ron (mohm) iout=5a vcc=8v & 36v 5 10152025303540 vcc (v) 20 30 40 50 60 70 80 90 100 ron (mohm) iout=5a tc=150oc tc=25oc tc= -40oc
VND830ASP-E application information doc id 17605 rev 1 17/27 3 application information figure 19. application schematic 3.1 gnd protection network against reverse battery 3.1.1 solution 1: resist or in the ground line (r gnd only) this can be used with any type of load. the following is an indication on how to dimension the r gnd resistor. 1. r gnd 600 mv / i s(on)max 2. r gnd ( -v cc ) / (-i gnd ) where -i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the device?s datasheet. power dissipation in r gnd (when v cc < 0: during reverse battery situations) is: p d = (-v cc ) 2 / r gnd this resistor can be shared amongst several different hsds. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that if the microprocessor ground is not shared by the device ground then the r gnd produces a shift (i s(on)max * r gnd ) in the input thresholds and the status output values. this shift varies depending on how many devices are on in the case of several high-side drivers sharing the same r gnd . if the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then st sugg ests to utilize solution 2 (see section 3.1.2 ). v cc gnd output2 current sense1 d ld +5v r prot r sense2 output1 r sense1 input1 d gnd r gnd v gnd current sense2 input2 c r prot r prot r prot
application information VND830ASP-E 18/27 doc id 17605 rev 1 3.1.2 solution 2: diode (d gnd ) in the ground line a resistor (r gnd = 1 k ) should be inserted in parallel to d gnd if the device drives an inductive load. this small signal diode can be safely shared amongst several different hsds. also in this case, the presence of the ground network produces a shift ( 600 mv) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. this shift does not vary if more than one hsd shares the same diode/resistor network. series resistor in input and status lines are also required to prevent that, during battery voltage transient, the current exceeds the absolute maximum rating. safest configuration for unused input and status pin is to leave them unconnected, while unused sense pin has to be connected to ground pin. 3.2 load dump protection d ld is necessary (voltage transient suppresso r ) if the load dump peak voltage exceeds the v cc max dc rating. the same applies if the device is subject to transients on the v cc line that are greater than the ones shown in ta bl e 1 1 . 3.3 mcu i/os protection if a ground protection network is used and negative transient are present on the v cc line, the control pins are pulled negative. st suggests to insert a resistor (r prot ) in line to prevent the microcontroller i/os pins to latch-up. the value of these resistors is a compromise between the leakage current of microcontroller and the current required by the hsd i/os (input levels compatibility) with the latch-up limit of microcontroller i/os. -v ccpeak /i latchup r prot (v oh c -v ih -v gnd ) / i ihmax calculation example: for v ccpeak = -100 v and i latchup 20 ma; v oh c 4.5 v 5k r prot 65 k . recommended values: r prot =10 k .
VND830ASP-E application information doc id 17605 rev 1 19/27 3.4 powerso-10 maximum demagnetization energy (v cc = 13.5 v) figure 20. maximum turn- off current versus load inductance (1) 1. values are generated with r l =0 in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves b and c. c: repetitive pulse at t jstart =125c a: single pulse at t jstart = 150 c b: repetitive pulse at t jstart = 100 c condition: v cc = 13.5 v v in , i l t demagnetization demagnetization demagnetization
package and pcb thermal data VND830ASP-E 20/27 doc id 17605 rev 1 4 package and pcb thermal data 4.1 powerso-10 thermal data figure 21. powerso-10 pc board (1) 1. layout condition of r th and z th measurements (pcb fr4 area= 58 mm x 58 mm, pcb thickness=2 mm, cu thickness = 35 m, copper areas: from minimum pad lay-out to 8 cm 2 ). figure 22. r thj-amb vs pcb copper area in open box free air condition 30 35 40 45 50 55 0246810 pcb cu heatsink area (cm^2) rthj_amb (c/w) tj-tamb=50c
VND830ASP-E package and pcb thermal data doc id 17605 rev 1 21/27 figure 23. powerso-10 thermal impeda nce junction ambient single pulse equation 1 : pulse calculation formula figure 24. thermal fitting model of a double channel hsd in powerso-10 z th r th z thtp 1 ? () + ? = where t p t ? = t_amb pd1 c1 r4 c3 c4 r3 r1 r6 r5 r2 c5 c6 c2 pd2 r2 c1 c2 r1 tj_1 tj_2
package and pcb thermal data VND830ASP-E 22/27 doc id 17605 rev 1 table 14. thermal parameter area/island (cm 2 )0.56 r1 (c/ w) 0.15 r2 (c/ w) 0.8 r3 (c/ w) 0.7 r4 (c/ w) 0.8 r5 (c/ w) 12 r6 (c/ w) 37 22 c1 (w.s/ c) 0.0006 c2 (w.s /c) 2.10e-03 c3 (w.s/ c) 0.013 c4 (w.s/ c) 0.3 c5 (w.s/ c) 0.75 c6 (w.s/ c) 3 5
VND830ASP-E package and packing information doc id 17605 rev 1 23/27 5 package and packing information 5.1 ecopack ? packages in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com. ecopack ? is an st trademark. 5.2 powerso-10 mechanical data figure 25. powerso-10 package dimensions detail "a" plane seating l a1 f a1 h a d d1 = = = = e4 0.10 a e c a b b detail "a" seating plane e2 10 1 eb he 0.25
package and packing information VND830ASP-E 24/27 doc id 17605 rev 1 table 15. powerso-10 mechanical data dim. millimeters min. typ. max. a 3.35 3.65 a (1) 1. muar only poa p013p. 3.4 3.6 a1 0 0.10 b 0.40 0.60 b (1) 0.37 0.53 c 0.35 0.55 c (1) 0.23 0.32 d 9.40 9.60 d1 7.40 7.60 e 9.30 9.50 e2 7.20 7.60 e2 (1) 7.30 7.50 e4 5.90 6.10 e4 (1) 5.90 6.30 e1.27 f 1.25 1.35 f (1) 1.20 1.40 h 13.80 14.40 h (1) 13.85 14.35 h0.50 l 1.20 1.80 l (1) 0.80 1.10 0 8 (1) 2 8
VND830ASP-E package and packing information doc id 17605 rev 1 25/27 5.3 powerso-10 packing information figure 26. powerso-10 suggested pad layout and tube shipment (no suffix) figure 27. tape and reel shipment (suffix ?tr?) 6. 30 10.8 - 11 14.6 - 14.9 9.5 1 2 3 4 5 1.27 0.67 - 0.73 0. 54 - 0.6 10 9 8 7 6 b a c all dimensions are in mm. base q.ty bulk q.ty tube length ( 0.5) a b c ( 0.1) casablanca 50 1000 532 10.4 16.4 0.8 muar 50 1000 532 4.9 17.2 0.8 reel dimensions all dimensions are in mm. base q.ty 600 bulk q.ty 600 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 24.4 n (min) 60 t (max) 30.4 tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 24 tape hole spacing p0 ( 0.1) 4 component spacing p 24 hole diameter d ( 0.1/-0) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.05) 11.5 compartment depth k (max) 6.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed
revision history VND830ASP-E 26/27 doc id 17605 rev 1 6 revision history table 16. document revision history date revision changes 19-jul-2010 1 initial release.
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